Artificial-intelligence accelerators can perform enormous numbers of arithmetic operations, yet often wait for data. Model parameters must move from high-bandwidth memory to processors; partial results must travel among chips; and thousands of accelerators must synchronize across a network. The energy and delay of those movements are becoming as important as transistor speed.

Photonics offers a different physical channel. Electrical wires lose signal quality as speed and distance increase, requiring equalization and repeaters that consume power. Light can carry many wavelength channels through one fiber with low loss and limited interference. The strongest near-term case is therefore not an entirely optical computer. It is replacing the most constrained electrical links and, selectively, performing linear algebra in the optical domain.

Optical Links Move Toward the Package

Data centers already use optical fiber between switches and racks, but conventional pluggable transceivers sit at the faceplate. High-speed electrical traces still carry data from a switch chip to those modules. As lane rates rise, that short electrical journey consumes more power and becomes harder to engineer.

Co-packaged optics places optical engines next to the switch or accelerator. TSMC announced its Compact Universal Photonic Engine roadmap in April 2024, with pluggable qualification planned for 2025 and integration with its CoWoS packaging platform in 2026, “bringing optical connections directly into the package” (TSMC). Its 2024 annual report described a first-generation electrical chip bonded on a photonics chip and a co-packaged-optics design intended to increase bandwidth while reducing system power (TSMC).

NVIDIA's March 2025 silicon-photonics announcement provided a measure of the intended scale: switch configurations with 100 or 400 terabits per second of aggregate throughput and ports operating at up to 1.6 terabits per second. The company claimed 3.5 times better power efficiency and four times fewer lasers than traditional designs (NVIDIA). Those are vendor comparisons that deployments must verify, but they show why optical input/output has become part of mainstream AI infrastructure roadmaps.

Research systems demonstrate wavelength-level scaling. A 2023 Nature Photonics experiment used a chip-scale Kerr frequency comb to transmit 512 gigabits per second over a single fiber through 32 independent wavelength channels (Nature Photonics). Wavelength-division multiplexing is the crucial advantage: aggregate bandwidth can grow without adding a separate conductor for every channel.

Computing With Light Is a Harder Proposition

Many AI workloads repeatedly multiply matrices and vectors. Optical interference can perform those linear transforms in parallel, and modulators can encode inputs at high rates. That creates the prospect of high throughput with little energy spent on each multiply-accumulate operation.

Laboratory results are promising but specialized. A 2024 Nature study used partially coherent light in two photonic platforms, including a silicon photonic tensor core that performed convolution at 0.108 trillion operations per second and classified MNIST digits at 92.4 percent accuracy (Nature). Another integrated reservoir-computing experiment reported more than 200 trillion operations per second for its optical core (Nature Communications). Such figures are not directly comparable with digital-accelerator specifications: definitions of an operation, precision, memory traffic, conversion energy, and supported workloads differ.

Photonic Computing Could Break AI’s Bandwidth Bottleneck — supporting image
Photonic Computing Could Break AI’s Bandwidth Bottleneck — supporting image

Optics excels at movement and linear operations, while activation functions, control flow, storage, and high-precision accumulation remain easier electronically. Practical systems are consequently hybrid. Electronics prepare data and weights, digital-to-analog converters drive modulators, photodetectors capture results, and analog-to-digital converters return them to digital form. If conversion and memory movement dominate energy, an efficient optical core can lose its advantage.

Packaging and Precision Decide the Outcome

Photonic systems face manufacturing problems unfamiliar to purely digital chips. Lasers must be efficient and serviceable. Waveguides and fibers require precise alignment. Temperature shifts optical phase and resonance, creating calibration overhead. Splitters and crossings introduce loss; detectors add noise; and analog computation must tolerate limited precision. Co-packaged designs also place heat-generating electronics near temperature-sensitive optics.

Reliability changes the economics. Replacing a front-panel module is straightforward; repairing an optical engine sealed beside an expensive switch ASIC is not. External laser modules, redundant paths, known-good-die testing, and standardized optical interfaces are therefore as consequential as raw bandwidth. Supply chains must coordinate foundries, compound-semiconductor lasers, packaging houses, fiber components, and system software.

The first decisive photonic gains are likely to arrive in interconnects: rack-scale networks, memory fabrics, and chip-to-chip optical input/output. Optical matrix engines may follow in workloads that accept modest precision and reuse data enough to amortize conversions. Claims should be evaluated at the complete system boundary, including lasers, converters, calibration, memory, and cooling.

Photonics will not remove every AI bottleneck. It can, however, change the cost of the one that is becoming most stubborn: moving an expanding volume of data quickly enough, and with little enough energy, to keep expensive compute units useful.

Sources